Dialogue Session III: WBG Devices and Applications

Monday, April 10, 2017


D3.1 Testing the Switching Capability of a Normally-off 800 V - 2 A Vertical GaN Power Transistor

Amy Romero
Ronming Chu
Rolando Burgos

Abstract
Vertical GaN devices are capable of having a smaller specific on-state resistance than SiC and silicon devices. Yet, the high specific on-state resistances of GaN substrates has created a barrier in the advancement of vertical GaN device technology. This paper will detail the functionality of HRL’s recently developed normally-off vertical GaN transistor which is rated for 800 V and 2 A. The bare die of the transistor is mounted onto a specially made PCB and tested. Also included in the analysis is a static characterization consisting of the transfer characteristics, output characteristics and on-state resistance over current. The device is then switched at various voltages and currents to allow for the evaluation of the switching of the device. It is one of the first normally-off vertical GaN transistors to be switched up to 400 V.


D3.2. A Novel Wide Band Gap Based Bi-Directional On Board Charger

Bin Li
Fred C. Lee
Qiang Li
Zhengyang Liu

Abstract
Due to the absence of reverse recovery charge and small junction capacitance, wide-band-gap devices are employed for bi-directional on-board charger with the objectives to achieve highest efficiency and power density. A novel two-stage topology is proposed. The 1st stage, employing an interleaved bridgeless PFC in critical conduction mode to realize ZVS, is operated at over 300k Hz. A bi-directional CLLC resonant converter operating at 500Hz is chosen for the 2nd stage. A variable dc-link voltage is adopted to track the wide battery voltage range so that the CLLC resonant converter can always operate at its most efficient point. 1.2k V SiC devices are employed for the high voltage side and GaN devices for the low voltage side. The proposed structure has been demonstrated with 43W/in3 power density and above 96% efficiency over the entire battery voltage range, both far exceed the current practice.


D3.3. High Frequency Active Clamp Flyback Converter with GaN Devices for Low Power AC-DC Adapter

Weijing Du
Xiuxheng Huang
Fred C. Lee
Qiang Li


Please note: This paper will be presented by Zhengrong Huang (pictured), as Weijing Du has graduated.

Abstract
With the amazing progress on microprocessors, integrating the voltage regulators module into internal CPU, more precise power control can be realized and power consumption can be decreased by more than 40%~60%. As a result, wall adaptor with 45W or below will power most laptop and notebook computers, and 45W adapter becomes the mainstream for the laptop power supply. This paper demonstrates a high frequency, high efficiency and high power density design of active clamp flyback converter for 45W adapter application. Both primary and secondary switches are gallium nitride (GaN) devices to reduce the conduction and switching loss. PCB winded transformer integrated with shielding layers are employed to improve the EMI performance and make the automation manufacture possible to reduce the labor cost. Close loop control is achieved by using microcontroller (MCU) from Texas Instruments. A prototype with 20V/2.25A output condition was built and can achieve 93% peak efficiency. Power density is 25W/in3 (including case), which is more than three times of the state-of-the-art product. Meanwhile, based on the same prototype, different output condition (15V/3A) with close loop control was tested under lower frequency range, and can also achieve very high efficiency.


D3.4. Wide-Input-Voltage-Range Dual-Output GaN-based Isolated DC-DC Converter for Aerospace Applications

Xingye Liu
Rolando Burgos
Bingyao Sun
Dushan Boroyevich

Abstract
This paper presents the in-depth design of an isolated dc-dc power converter for aerospace applications rated at 30 W, dual 15 V dc outputs, 10–80 V input, switching at 1 MHz and using enhancement-mode GaN power transistors. A recently proposed three-switch active-clamp flyback topology is chosen as an effective means to deal with the large input voltage variation, and meet the high efficiency target at full load (>90 %). A planar transformer is designed and optimized according to the desired converter operating mode. The paper presents additionally the full evaluation of the converter under varying voltage and load conditions, demonstrating a peak efficiency of 92.4 % and a power density of 40 W/in3.


D3.5. Design of a Two-Switch Flyback Power Supply Using 1.7 kV SiC Devices for Ultra-Wide Input-Voltage Range Applications

Gabriele Rizzoli
Jun Wang
Zhiyu Shen
Rolando Burgos
Dushan Boroyevich
Luca Zarri


Please note: This paper will be presented by Jun Wang (pictured), as Gabriele Rizzoli has graduated.

Abstract
This paper presents the design and evaluation of a two-switch flyback power supply with ultra-wide input voltage range (230–1300 V), fed from the floating dc bus of power electronics building blocks (PEBB) in medium voltage (MV) modular multilevel converter (MMC) applications. Rated at 80 W, 48 V output, and operating at 50 kHz, the proposed converter uses 1.7 kV SiC devices and a planar PCB-winding transformer to achieve a low-profile form factor. Further, a pre-charge circuit and start-up sequence are developed as well, enabling the two-switch flyback converter to wake up at 230 V. Experimental results are presented for verification and evaluation purposes.


D3.6. Design and investigation of medium-voltage high-power industrial motor drives in presence of medium-voltage SiC MOSFETs

Alinaghi Marzoughi
Rolando Burgos
Dushan Boroyevich

Abstract
The SiC MOSFETs are becoming game-changing devices in the field of power electronics, enabling higher temperatures, power densities and efficiencies. In higher voltages than 1.7 kV, these semiconductors are at early stages of development and yet not commercialized. Based on characterization results of state-of-the-art 3.3 kV SiC MOSFETs, for the first time this paper investigates design and comparison of topologies commercially used for medium-voltage drives in range of 4.16-13.8 kV in presence of medium-voltage SiC MOSFETs. For this purpose, the cascaded H-bridge (CHB), modular multilevel converter (MMC) and five level active neutral point clamped (5-L ANPC) topologies are designed for industrial drives at 4.16-, 6.9- and 13.8 kV voltage ratings (4.16- and 6.9 kV for 5- L ANPC) and 3- and 5 MVA power ratings. Design is performed using commercially used medium-voltage Si IGBTs as well as 3.3 kV SiC MOSFETs, in order to have a comparison between topologies using existing semiconductors and also to investigate future trends of medium-voltage motor drives in presence of medium-voltage SiC MOSFETs. Based on design data, comparisons are done among the mentioned topologies from different points of view such as efficiency, power density, passive components and semiconductor utilization.

Video Nugget


D3.7. Integrated Switch Current Sensor for Shortcircuit Protection and Current Control of 1.7-kV SiC MOSFET Modules

Jun Wang
Zhiyu Shen
Rolando Burgos
Dushan Boroyevich

Abstract
This paper presents design and implementations of a switch current sensor based on Rogowski coils. The current sensor is designed to address the issue of using desaturation circuit to protect the SiC MOSFET during shortcircuit. Specifications are given to meet the application requirement for SiC MOSFETs. It is also designed for high accuracy and high bandwidth for converter current control. PCB-based winding and shielding layout is proposed to minimize the noises caused by the high dv/dt at switching. The coil on PCB are modeled by impedance measurement, thus the bandwidth of coil is calculated. At the end, various test results are demonstrated to validate the great performance of the switch current sensor.


D3.8. Evaluations on the Reverse Behaviors of the Latest-Generation SiC MOSFET and SiC Schottky Barrier Diode

Sharon Hou
Rolando Burgos
Dushan Boroyevich


Please note: This paper will be presented by Amy Romero (pictured), as Sharon Hou has graduated.

Abstract
Though the reverse recovery of SiC MOSFET is improved compared with Si MOSFET, SiC MOSFET products with SBD (Schottky Barrier Diode) packaged together are still being widely developed due to not yet satisfying reverse recovery problem and high conduction loss of body diode. In this paper, the reverse behavior of the record-high current-rating discrete SiC MOSFET of CREE’s 3rd Gen is evaluated. CREE’s 1.2kV SiC SBDs are compared on its current sharing capabilities when paralleling with SiC MOSFET. The switching transient behaviors are compared between SiC MOSFET and SiC MOSFET paralleling with SiC SBD with load current ranging from 10A to 95A under both room and high temperature. Paralleling SiC SBDs with SiC MOSFET presents deduction in conduction loss compared with SiC MOSFET’s body diode conducting only. However, the improvement of the SiC SBD paralleling with the SiC MOSFET in switching behavior is very trivial. Unlike the popularity in paralleling SBD with Si MOSFET to tremendously reduce the switching energy, the necessity to parallel SBD with SiC MOSFET becomes trivial in switching energy reduction sense.


D3.9. Passive Balancing of Peak Currents between Paralleled MOSFETs with Unequal Threshold Voltages

Yincan Mao
Zichen Miao
Chi-Ming Wang
Khai D. T. Ngo

Abstract
The peak switching currents of two paralleled MOSFETs turned on/off by one gate driver could differ significantly owing to the mismatch in threshold voltages (Vth). The passive balancing method described herein employs one inductor and one resistor per MOSFET to force the currents to track with negligible penalty in loss. Sensors, feedbacks, and knowledge of gate-related parameters (like gate charge, polarity of Vth difference, gate impedances, etc.) are not required. The passive components are designed using an inequality involving Vth, rise time, and unbalance percentage. The mismatch in peak currents is reduced from 15% to 1% between SiC MOSFETs tested at 20 A and 300 V with 19% Vth variation.


D3.10. On the Measurement of Switching Energy

Zichen Miao
Ting Ge
Khai D. T. Ngo

Abstract
The existing methods for calculation of switching energy based on the terminal power waveform require the identifications of the transient ending point. The calculated switching energy at various gate resistances, load currents, and input voltages could be inconsistent due to the difficulty in ascertaining the transient ending point especially when the ringing is severe. A calculation method independent of selection of transient timing is introduced with simulation demonstration in the paper.


D3.11. Design and development of a 10 kV, 60 A SiC MOSFET module

Christina DiMarino
Dushan Boroyevich
Rolando Burgos
Mark Johnson

Abstract
High-voltage silicon carbide (SiC) transistors have been demonstrated in recent years, and now Cree’s 3rd-generation 10 kV, 350 mΩ SiC MOSFET is becoming available. This device is capable of switching higher voltages faster, and with lower losses, than Si IGBTs. These features reduce the complexity of medium-voltage systems, since simpler topologies with fewer levels can be used, and allow for the realization of new applications. The aim of this work is to develop a high-density, high-speed, half-bridge module for these 10 kV SiC MOSFETs without antiparallel diodes; instead, the reverse current will flow through the MOSFET channel, and the body diode will only conduct during the deadtime. There are several challenges associated with this objective. In particular, the desire for high density will increase the electric field concentration within the module. This is a new challenge that has not been explicitly addressed before, and it arises from the development of this high-density, high-voltage SiC device. This paper is the first detailed report on the optimization of a high-voltage SiC MOSFET module.


D3.12. Phase Leg Design and Dynamic Characterization with two 650 V/ 60 A GaN HEMTs in parallel

Nidhi Haryani
Jun Wang
Rolando Burgos
Xuning Zhang

Abstract
In this paper, the design and operation of two 650 V/ 60 A Gallium Nitride (GaN) devices in parallel is discussed in detail, further, the challenges faced and the trade-offs required for paralleling high speed GaN devices are also examined. The dynamic characterization of two devices in parallel is presented in detail. The phase leg design requires both power loops and gate loops to be as small and as identical as possible for the two devices as for high speed GaN devices, even a small parasitic inductance or capacitance added due to the layout causes high overshoot in device voltage and current. Different phase leg designs are compared in terms of tradeoff between power loop and gate loop inductances. Dynamic characterization performed includes characterization of a single device till 400 V, 60 A which then goes on to discuss characterization for paralleled devices. The major challenge faced in paralleling is the issue of circulating current between the two devices during turn-on transient which is discussed in detail, its causes and ways to mitigate the circulating current are also presented.

Video Nugget


D3.13. Design of GaN-based MHz Totem-pole PFC Rectifier

Zhengyang Liu
Fred C. Lee
Qiang Li
Yuchen Yang

Abstract
The totem-pole bridgeless power factor correction (PFC) rectifier has recently been recognized as a promising front-end candidate for applications like servers and telecommunication power supplies. This paper begins with a discussion of the advantages of using emerging high-voltage gallium-nitride (GaN) devices in totem-pole PFC rectifiers rather than traditional PFC rectifiers. The critical-mode operation is used in the totem-pole PFC rectifier in order to achieve both high frequency and high efficiency. Then, several high-frequency issues and detailed design considerations are introduced, including extending zero-voltage-switching operation for the entire linecycle, a variable on-time strategy for zero-crossing distortion suppression, and interleaving control for ripple current cancellation. The volume reduction of differential-mode electromagnetic interference filters is also presented, which benefits greatly from MHz high-frequency operation and multiphase interleaving. Finally, a dual-phase interleaved GaN-based MHz totem-pole PFC rectifier is demonstrated with 99% peak efficiency and 220 W/in3 power density.


D3.14. Digital-Based Interleaving Control for GaN-based MHz CRM Totem-pole PFC

Zhengyang Liu
Zhengrong Huang
Fred C. Lee
Qiang Li

Abstract
This paper presents a comparison between the performances of different interleaving control methods for gallium nitride devices-based MHz critical conduction mode (CRM) totem-pole power factor correction (PFC) circuit. Both closedloop interleaving and open-loop interleaving are good for the 70-kHz CRM PFC; but for a MHz frequency CRM PFC with microcontroller (MCU) implementation, the open-loop interleaving outperforms the closed-loop interleaving with only a small and nonamplified phase error. After software optimization, the phase error of the open-loop interleaving is smaller than 3° at 1 MHz, when the control is implemented by a 60-MHz low-cost MCU. Significant ripple cancellation effect and differential-mode (DM) filter size reduction are achieved with good interleaving. For a 1.2-kW MHz totem-pole PFC, the DM filter size is reduced to one quarter when compared with the counterpart of a 100-kHz PFC. Last but not least, the stability of the open-loop interleaving is also analyzed indicating that the MHz CRM totem-pole PFC with voltage-mode control, open-loop interleaving, and turn-on instant synchronization can maintain critical mode operation with better stability compared with the 70-kHz CRM PFC.


NP3.1. Gate Driver and Phase Leg Design for GaN E-HEMT Device in High Power Application

Yingying Gui
Rolando Burgos

There is no paper associated with this session number. Click below to view the poster.


NP3.2. Gate Driver Design for 1.2 kV 300 A SiC MOSFET Module with Integrated Rogowski Coil current sensor

Slavko Mocevic
Jun Wang
Rolando Burgos
Dushan Boroyevich

There is no paper associated with this session number. Click below to view the poster.


NP3.3. 20 W Power Supply Design for 10 kV SiC MOSFET Module Gate Drive

Jiewen Hu
Rolando Burgos
Dushan Boroyevich

There is no paper associated with this session number. Click below to view the poster.


NP3.4. Active dv/dt Control for Dynamic Voltage Balancing in Fast-Switched Stacked SiC MOSFETs

Alinaghi Marzoughi
Jun Wang
Rolando Burgos
Dushan Boroyevich

There is no paper associated with this session number. Click below to view the poster.


NP3.5. Dependence of Change in SiC MOSFET Threshold Voltage from Electrical and Thermal Stresses

Joseph P. Kozak
Khai Ngo

There is no paper associated with this session number. Click below to view the poster.


NP3.6. Gate-Driver for High-Current Silicon-Carbide Semiconductor Power Modules

Keyao Sun
Jun Wang
Rolando Burgos
Dushan Boroyevich

There is no paper associated with this session number. Click below to view the poster.


NP3.7. 10 kV, 120 A SiC MOSFET Modules for a Power Electronics Building Block (PEBB)

Christina DiMarino
Igor Cvetkovic
Zhiyu Shen
Rolando Burgos
Dushan Boroyevich

There is no paper associated with this session number. Click below to view the poster.


NP3.8. Gate Driver Design for 800V 40A Full-SiC 3-level NPC Module

Eric Giewont
Sungjae Ohn
Rolando Burgos
Dushan Boroyevich

There is no paper associated with this session number. Click below to view the poster.


NP3.9. Wide Bandgap Device Application in PV Inverter Prototype Construction

Rebecca Rye
Ye Tang
Rolando Burgos

There is no paper associated with this session number. Click below to view the poster.


NP3.10. Integrated Rogowski Coil Current Sensor Short-Circuit Protection Performance

Slavko Mocevic
Jun Wang
Rolando Burgos
Dushan Boroyevich

There is no paper associated with this session number. Click below to view the poster.